Next Generation Computing
3D stackable neuron, synapse
To reduce computing power, we are developing next-generation MOS devices using III-V, Ge, who have much better intrinsic transport characteristics than conventional Si. Not only beyond conventional CMOS under Von-Neumann architecture, we initiated the research on semiconductor devices for artificial neural network / neuromorphic computing. To realize the ultra-low computing, we are developing 3D stackable neuronal and synaptic devices, which would be ultimate device structure minimizing the power consumption in the interconnect as well as the power consumption for computing.